at91-sama5d27_som1.dtsi 2.01 KB
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
 *
 *  Copyright (c) 2017, Microchip Technology Inc.
 *                2017 Cristian Birsan <cristian.birsan@microchip.com>
 *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
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 */
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#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"
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/ {
	model = "Atmel SAMA5D27 SoM1";
	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
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	clocks {
		slow_xtal {
			clock-frequency = <32768>;
		};
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		main_xtal {
			clock-frequency = <24000000>;
		};
	};
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	ahb {
		apb {
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			qspi1: spi@f0024000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_qspi1_default>;

				flash@0 {
					compatible = "jedec,spi-nor";
					reg = <0>;
					spi-max-frequency = <80000000>;
					spi-tx-bus-width = <4>;
					spi-rx-bus-width = <4>;
					m25p,fast-read;
				};
			};

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			macb0: ethernet@f8008000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_default>;
				phy-mode = "rmii";
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				ethernet-phy@0 {
					reg = <0x0>;
					interrupt-parent = <&pioA>;
					interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
				};
			};
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			pinctrl@fc038000 {
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				pinctrl_qspi1_default: qspi1_default {
					sck_cs {
						pinmux = <PIN_PB5__QSPI1_SCK>,
							 <PIN_PB6__QSPI1_CS>;
						bias-disable;
					};

					data {
						pinmux = <PIN_PB7__QSPI1_IO0>,
							 <PIN_PB8__QSPI1_IO1>,
							 <PIN_PB9__QSPI1_IO2>,
							 <PIN_PB10__QSPI1_IO3>;
						bias-pull-up;
					};
				};

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				pinctrl_macb0_default: macb0_default {
					pinmux = <PIN_PD9__GTXCK>,
						 <PIN_PD10__GTXEN>,
						 <PIN_PD11__GRXDV>,
						 <PIN_PD12__GRXER>,
						 <PIN_PD13__GRX0>,
						 <PIN_PD14__GRX1>,
						 <PIN_PD15__GTX0>,
						 <PIN_PD16__GTX1>,
						 <PIN_PD17__GMDC>,
						 <PIN_PD18__GMDIO>;
					bias-disable;
				};
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				pinctrl_macb0_phy_irq: macb0_phy_irq {
					pinmux = <PIN_PD31__GPIO>;
					bias-disable;
				};
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			};
		};
	};
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};