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packages
kernel
linux
Commits
e39996ed
Commit
e39996ed
authored
Apr 23, 2017
by
Lorenzo "Palinuro" Faletra
Browse files
Import Upstream version 4.9.18
parent
4ae6901a
Changes
423
Hide whitespace changes
Inline
Side-by-side
Documentation/arm64/silicon-errata.txt
View file @
e39996ed
...
...
@@ -42,24 +42,26 @@ file acts as a registry of software workarounds in the Linux Kernel and
will be updated when new workarounds are committed and backported to
stable kernels.
| Implementor | Component | Erratum ID | Kconfig |
+----------------+-----------------+-----------------+-------------------------+
| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
| ARM | Cortex-A57 | #852523 | N/A |
| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
| ARM | Cortex-A72 | #853709 | N/A |
| ARM | MMU-500 | #841119,#826419 | N/A |
| | | | |
| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
| Cavium | ThunderX SMMUv2 | #27704 | N/A |
| | | | |
| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
| Implementor | Component | Erratum ID | Kconfig |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
| ARM | Cortex-A57 | #852523 | N/A |
| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
| ARM | Cortex-A72 | #853709 | N/A |
| ARM | MMU-500 | #841119,#826419 | N/A |
| | | | |
| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
| Cavium | ThunderX SMMUv2 | #27704 | N/A |
| | | | |
| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
| | | | |
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
Makefile
View file @
e39996ed
VERSION
=
4
PATCHLEVEL
=
9
SUBLEVEL
=
1
3
SUBLEVEL
=
1
8
EXTRAVERSION
=
NAME
=
Roaring Lionus
...
...
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View file @
e39996ed
...
...
@@ -148,6 +148,8 @@ pdmic@f8018000 {
uart1
:
serial
@
f8020000
{
pinctrl
-
names
=
"default"
;
pinctrl
-
0
=
<&
pinctrl_uart1_default
>;
atmel
,
use
-
dma
-
rx
;
atmel
,
use
-
dma
-
tx
;
status
=
"okay"
;
};
...
...
arch/arm/boot/dts/at91-sama5d4_xplained.dts
View file @
e39996ed
...
...
@@ -110,6 +110,8 @@ slot@0 {
};
usart3
:
serial
@
fc00c000
{
atmel
,
use
-
dma
-
rx
;
atmel
,
use
-
dma
-
tx
;
status
=
"okay"
;
};
...
...
arch/arm/include/asm/kvm_mmu.h
View file @
e39996ed
...
...
@@ -150,18 +150,12 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
* and iterate over the range.
*/
bool
need_flush
=
!
vcpu_has_cache_enabled
(
vcpu
)
||
ipa_uncached
;
VM_BUG_ON
(
size
&
~
PAGE_MASK
);
if
(
!
need_flush
&&
!
icache_is_pipt
())
goto
vipt_cache
;
while
(
size
)
{
void
*
va
=
kmap_atomic_pfn
(
pfn
);
if
(
need_flush
)
kvm_flush_dcache_to_poc
(
va
,
PAGE_SIZE
);
kvm_flush_dcache_to_poc
(
va
,
PAGE_SIZE
);
if
(
icache_is_pipt
())
__cpuc_coherent_user_range
((
unsigned
long
)
va
,
...
...
@@ -173,7 +167,6 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
kunmap_atomic
(
va
);
}
vipt_cache:
if
(
!
icache_is_pipt
()
&&
!
icache_is_vivt_asid_tagged
())
{
/* any kind of VIPT cache */
__flush_icache_all
();
...
...
arch/arm64/Kconfig
View file @
e39996ed
...
...
@@ -474,6 +474,16 @@ config CAVIUM_ERRATUM_27456
If unsure, say Y.
config QCOM_QDF2400_ERRATUM_0065
bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"
default y
help
On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports
ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have
been indicated as 16Bytes (0xf), not 8Bytes (0x7).
If unsure, say Y.
endmenu
...
...
arch/arm64/include/asm/kvm_mmu.h
View file @
e39996ed
...
...
@@ -241,8 +241,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
{
void
*
va
=
page_address
(
pfn_to_page
(
pfn
));
if
(
!
vcpu_has_cache_enabled
(
vcpu
)
||
ipa_uncached
)
kvm_flush_dcache_to_poc
(
va
,
size
);
kvm_flush_dcache_to_poc
(
va
,
size
);
if
(
!
icache_is_aliasing
())
{
/* PIPT */
flush_icache_range
((
unsigned
long
)
va
,
...
...
arch/arm64/kernel/cpufeature.c
View file @
e39996ed
...
...
@@ -653,15 +653,15 @@ static u64 __raw_read_system_reg(u32 sys_id)
case
SYS_ID_ISAR2_EL1
:
return
read_cpuid
(
ID_ISAR2_EL1
);
case
SYS_ID_ISAR3_EL1
:
return
read_cpuid
(
ID_ISAR3_EL1
);
case
SYS_ID_ISAR4_EL1
:
return
read_cpuid
(
ID_ISAR4_EL1
);
case
SYS_ID_ISAR5_EL1
:
return
read_cpuid
(
ID_ISAR
4
_EL1
);
case
SYS_ID_ISAR5_EL1
:
return
read_cpuid
(
ID_ISAR
5
_EL1
);
case
SYS_MVFR0_EL1
:
return
read_cpuid
(
MVFR0_EL1
);
case
SYS_MVFR1_EL1
:
return
read_cpuid
(
MVFR1_EL1
);
case
SYS_MVFR2_EL1
:
return
read_cpuid
(
MVFR2_EL1
);
case
SYS_ID_AA64PFR0_EL1
:
return
read_cpuid
(
ID_AA64PFR0_EL1
);
case
SYS_ID_AA64PFR1_EL1
:
return
read_cpuid
(
ID_AA64PFR
0
_EL1
);
case
SYS_ID_AA64PFR1_EL1
:
return
read_cpuid
(
ID_AA64PFR
1
_EL1
);
case
SYS_ID_AA64DFR0_EL1
:
return
read_cpuid
(
ID_AA64DFR0_EL1
);
case
SYS_ID_AA64DFR1_EL1
:
return
read_cpuid
(
ID_AA64DFR
0
_EL1
);
case
SYS_ID_AA64DFR1_EL1
:
return
read_cpuid
(
ID_AA64DFR
1
_EL1
);
case
SYS_ID_AA64MMFR0_EL1
:
return
read_cpuid
(
ID_AA64MMFR0_EL1
);
case
SYS_ID_AA64MMFR1_EL1
:
return
read_cpuid
(
ID_AA64MMFR1_EL1
);
case
SYS_ID_AA64MMFR2_EL1
:
return
read_cpuid
(
ID_AA64MMFR2_EL1
);
...
...
arch/arm64/kvm/hyp/tlb.c
View file @
e39996ed
...
...
@@ -17,14 +17,62 @@
#include <asm/kvm_hyp.h>
static
void
__hyp_text
__tlb_switch_to_guest_vhe
(
struct
kvm
*
kvm
)
{
u64
val
;
/*
* With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and
* most TLB operations target EL2/EL0. In order to affect the
* guest TLBs (EL1/EL0), we need to change one of these two
* bits. Changing E2H is impossible (goodbye TTBR1_EL2), so
* let's flip TGE before executing the TLB operation.
*/
write_sysreg
(
kvm
->
arch
.
vttbr
,
vttbr_el2
);
val
=
read_sysreg
(
hcr_el2
);
val
&=
~
HCR_TGE
;
write_sysreg
(
val
,
hcr_el2
);
isb
();
}
static
void
__hyp_text
__tlb_switch_to_guest_nvhe
(
struct
kvm
*
kvm
)
{
write_sysreg
(
kvm
->
arch
.
vttbr
,
vttbr_el2
);
isb
();
}
static
hyp_alternate_select
(
__tlb_switch_to_guest
,
__tlb_switch_to_guest_nvhe
,
__tlb_switch_to_guest_vhe
,
ARM64_HAS_VIRT_HOST_EXTN
);
static
void
__hyp_text
__tlb_switch_to_host_vhe
(
struct
kvm
*
kvm
)
{
/*
* We're done with the TLB operation, let's restore the host's
* view of HCR_EL2.
*/
write_sysreg
(
0
,
vttbr_el2
);
write_sysreg
(
HCR_HOST_VHE_FLAGS
,
hcr_el2
);
}
static
void
__hyp_text
__tlb_switch_to_host_nvhe
(
struct
kvm
*
kvm
)
{
write_sysreg
(
0
,
vttbr_el2
);
}
static
hyp_alternate_select
(
__tlb_switch_to_host
,
__tlb_switch_to_host_nvhe
,
__tlb_switch_to_host_vhe
,
ARM64_HAS_VIRT_HOST_EXTN
);
void
__hyp_text
__kvm_tlb_flush_vmid_ipa
(
struct
kvm
*
kvm
,
phys_addr_t
ipa
)
{
dsb
(
ishst
);
/* Switch to requested VMID */
kvm
=
kern_hyp_va
(
kvm
);
write_sysreg
(
kvm
->
arch
.
vttbr
,
vttbr_el2
);
isb
();
__tlb_switch_to_guest
()(
kvm
);
/*
* We could do so much better if we had the VA as well.
...
...
@@ -45,7 +93,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
dsb
(
ish
);
isb
();
write_sysreg
(
0
,
vttbr_el2
);
__tlb_switch_to_host
()(
kvm
);
}
void
__hyp_text
__kvm_tlb_flush_vmid
(
struct
kvm
*
kvm
)
...
...
@@ -54,14 +102,13 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
/* Switch to requested VMID */
kvm
=
kern_hyp_va
(
kvm
);
write_sysreg
(
kvm
->
arch
.
vttbr
,
vttbr_el2
);
isb
();
__tlb_switch_to_guest
()(
kvm
);
asm
volatile
(
"tlbi vmalls12e1is"
:
:
);
dsb
(
ish
);
isb
();
write_sysreg
(
0
,
vttbr_el2
);
__tlb_switch_to_host
()(
kvm
);
}
void
__hyp_text
__kvm_tlb_flush_local_vmid
(
struct
kvm_vcpu
*
vcpu
)
...
...
@@ -69,14 +116,13 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
struct
kvm
*
kvm
=
kern_hyp_va
(
kern_hyp_va
(
vcpu
)
->
kvm
);
/* Switch to requested VMID */
write_sysreg
(
kvm
->
arch
.
vttbr
,
vttbr_el2
);
isb
();
__tlb_switch_to_guest
()(
kvm
);
asm
volatile
(
"tlbi vmalle1"
:
:
);
dsb
(
nsh
);
isb
();
write_sysreg
(
0
,
vttbr_el2
);
__tlb_switch_to_host
()(
kvm
);
}
void
__hyp_text
__kvm_flush_vm_context
(
void
)
...
...
arch/arm64/mm/dma-mapping.c
View file @
e39996ed
...
...
@@ -352,6 +352,13 @@ static int __swiotlb_dma_supported(struct device *hwdev, u64 mask)
return
1
;
}
static
int
__swiotlb_dma_mapping_error
(
struct
device
*
hwdev
,
dma_addr_t
addr
)
{
if
(
swiotlb
)
return
swiotlb_dma_mapping_error
(
hwdev
,
addr
);
return
0
;
}
static
struct
dma_map_ops
swiotlb_dma_ops
=
{
.
alloc
=
__dma_alloc
,
.
free
=
__dma_free
,
...
...
@@ -366,7 +373,7 @@ static struct dma_map_ops swiotlb_dma_ops = {
.
sync_sg_for_cpu
=
__swiotlb_sync_sg_for_cpu
,
.
sync_sg_for_device
=
__swiotlb_sync_sg_for_device
,
.
dma_supported
=
__swiotlb_dma_supported
,
.
mapping_error
=
swiotlb_dma_mapping_error
,
.
mapping_error
=
__
swiotlb_dma_mapping_error
,
};
static
int
__init
atomic_pool_init
(
void
)
...
...
arch/mips/bcm47xx/buttons.c
View file @
e39996ed
...
...
@@ -17,6 +17,12 @@
.active_low = 1, \
}
#define BCM47XX_GPIO_KEY_H(_gpio, _code) \
{ \
.code = _code, \
.gpio = _gpio, \
}
/* Asus */
static
const
struct
gpio_keys_button
...
...
@@ -79,8 +85,8 @@ bcm47xx_buttons_asus_wl500gpv2[] __initconst = {
static
const
struct
gpio_keys_button
bcm47xx_buttons_asus_wl500w
[]
__initconst
=
{
BCM47XX_GPIO_KEY
(
6
,
KEY_RESTART
),
BCM47XX_GPIO_KEY
(
7
,
KEY_WPS_BUTTON
),
BCM47XX_GPIO_KEY
_H
(
6
,
KEY_RESTART
),
BCM47XX_GPIO_KEY
_H
(
7
,
KEY_WPS_BUTTON
),
};
static
const
struct
gpio_keys_button
...
...
arch/mips/cavium-octeon/octeon-memcpy.S
View file @
e39996ed
...
...
@@ -208,18 +208,18 @@ EXC( STORE t2, UNIT(6)(dst), s_exc_p10u)
ADD
src
,
src
,
16
*
NBYTES
EXC
(
STORE
t3
,
UNIT
(
7
)(
dst
),
s_exc_p9u
)
ADD
dst
,
dst
,
16
*
NBYTES
EXC
(
LOAD
t0
,
UNIT
(-
8
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t1
,
UNIT
(-
7
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t2
,
UNIT
(-
6
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t3
,
UNIT
(-
5
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t0
,
UNIT
(-
8
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t1
,
UNIT
(-
7
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t2
,
UNIT
(-
6
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t3
,
UNIT
(-
5
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
STORE
t0
,
UNIT
(-
8
)(
dst
),
s_exc_p8u
)
EXC
(
STORE
t1
,
UNIT
(-
7
)(
dst
),
s_exc_p7u
)
EXC
(
STORE
t2
,
UNIT
(-
6
)(
dst
),
s_exc_p6u
)
EXC
(
STORE
t3
,
UNIT
(-
5
)(
dst
),
s_exc_p5u
)
EXC
(
LOAD
t0
,
UNIT
(-
4
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t1
,
UNIT
(-
3
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t2
,
UNIT
(-
2
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t3
,
UNIT
(-
1
)(
src
),
l_exc_copy
)
EXC
(
LOAD
t0
,
UNIT
(-
4
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t1
,
UNIT
(-
3
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t2
,
UNIT
(-
2
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
LOAD
t3
,
UNIT
(-
1
)(
src
),
l_exc_copy
_rewind16
)
EXC
(
STORE
t0
,
UNIT
(-
4
)(
dst
),
s_exc_p4u
)
EXC
(
STORE
t1
,
UNIT
(-
3
)(
dst
),
s_exc_p3u
)
EXC
(
STORE
t2
,
UNIT
(-
2
)(
dst
),
s_exc_p2u
)
...
...
@@ -383,6 +383,10 @@ done:
nop
END
(
memcpy
)
l_exc_copy_rewind16
:
/
*
Rewind
src
and
dst
by
16
*
NBYTES
for
l_exc_copy
*/
SUB
src
,
src
,
16
*
NBYTES
SUB
dst
,
dst
,
16
*
NBYTES
l_exc_copy
:
/
*
*
Copy
bytes
from
src
until
faulting
load
address
(
or
until
a
...
...
arch/mips/configs/ip22_defconfig
View file @
e39996ed
...
...
@@ -67,8 +67,8 @@ CONFIG_NETFILTER_NETLINK_QUEUE=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=
m
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_DCCP=
y
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
arch/mips/configs/ip27_defconfig
View file @
e39996ed
...
...
@@ -133,7 +133,7 @@ CONFIG_LIBFC=m
CONFIG_SCSI_QLOGIC_1280=y
CONFIG_SCSI_PMCRAID=m
CONFIG_SCSI_BFA_FC=m
CONFIG_SCSI_DH=
m
CONFIG_SCSI_DH=
y
CONFIG_SCSI_DH_RDAC=m
CONFIG_SCSI_DH_HP_SW=m
CONFIG_SCSI_DH_EMC=m
...
...
@@ -205,7 +205,6 @@ CONFIG_MLX4_EN=m
# CONFIG_MLX4_DEBUG is not set
CONFIG_TEHUTI=m
CONFIG_BNX2X=m
CONFIG_QLGE=m
CONFIG_SFC=m
CONFIG_BE2NET=m
CONFIG_LIBERTAS_THINFIRM=m
...
...
arch/mips/configs/lemote2f_defconfig
View file @
e39996ed
...
...
@@ -39,7 +39,7 @@ CONFIG_HIBERNATION=y
CONFIG_PM_STD_PARTITION="/dev/hda3"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEBUG=y
CONFIG_CPU_FREQ_STAT=
m
CONFIG_CPU_FREQ_STAT=
y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
...
...
arch/mips/configs/malta_defconfig
View file @
e39996ed
...
...
@@ -59,8 +59,8 @@ CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=
m
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_DCCP=
y
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
arch/mips/configs/malta_kvm_defconfig
View file @
e39996ed
...
...
@@ -60,8 +60,8 @@ CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=
m
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_DCCP=
y
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
arch/mips/configs/malta_kvm_guest_defconfig
View file @
e39996ed
...
...
@@ -59,8 +59,8 @@ CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=
m
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_DCCP=
y
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
arch/mips/configs/maltaup_xpa_defconfig
View file @
e39996ed
...
...
@@ -61,8 +61,8 @@ CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=
m
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_DCCP=
y
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
arch/mips/configs/nlm_xlp_defconfig
View file @
e39996ed
...
...
@@ -110,7 +110,7 @@ CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_UDPLITE=
m
CONFIG_NF_CT_PROTO_UDPLITE=
y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
...
...
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